ECOOP 2022
Mon 6 June - Thu 7 July 2022 Berlin, Germany
Mon 6 Jun 2022 13:30 - 14:10 at Stockholm - First afternoon session Chair(s): Gary Leavens

In this presentation, we’ll take a look at the bottom of the verification and monitoring stack. Firstly, we give an overview over hardware-level event sources, such as processor tracing facilities, and how to integrate them into monitoring approaches. Secondly, we discuss approaches to processing events in hardware on FPGAs of SoC or accelerator cards. We conclude with an in-depth look at a fully integrated hardware-assisted approach to detection of data races based on i) hardware traces, ii) hardware monitoring, and iii) the high-level specification language TeSSLa that has been used to synthesize reconfigurable monitors for deployment onto FPGAs.

Mon 6 Jun

Displayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change

13:30 - 15:00
First afternoon sessionVORTEX at Stockholm
Chair(s): Gary Leavens University of Central Florida
13:30
40m
Keynote
Hardware-assisted Runtime Monitoring
VORTEX
I: Volker Stolz Høgskulen på Vestlandet
Link to publication
14:10
20m
Talk
Predictive Semantics for Past-CTL Runtime Monitors
VORTEX
S: Giorgio Audrito Università di Torino, Volker Stolz Høgskulen på Vestlandet, Gianluca Torta
14:30
20m
Talk
HIBOU : Tooling Offline Runtime Verification against Interaction Models
VORTEX